SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

The first objective is to provide a semiconductor integrated circuit capable of reducing hardware overhead and temporal overhead for the purpose of error detection, and to enable the identification of a logical element which has generated an error. The second objective is to provide a semiconductor integrated circuit capable of hiding temporal overhead due to the reset time for a dynamic circuit and improving the effective computation throughput. With this semiconductor integrated circuit, a handshake is executed for each logical element and errors are detected for each logical element, so errors are not propagated to latter-stage logical elements. Furthermore, with this semiconductor integrated circuit, the same logic circuit is connected in parallel within each logical element and is driven with two phases.