发明名称 CIRCUIT BOARD AND FABRICATION METHOD THEREOF AND CHIP PACKAGE STRUCTURE
摘要 A fabrication method of a circuit board is provided. A substrate, a top pad, a base pad electrically connecting the top pad, and a top and a base solder resist layers are provided. The top and the base pads are disposed on two opposite surfaces of the substrate, respectively. The top solder resist layer having a first opening partially exposing the top pad and the base solder resist layer having a second opening partially exposing the base pad are disposed on the two surfaces, respectively. A conductive layer covering the base solder resist layer and the base pad is formed. A plating resist layer having a third opening is formed on the conductive layer. A current is applied to the conductive layer through the third opening for electroplating a pre-bump on the top pad. The plating resist layer and the conductive layer are then removed.
申请公布号 US2010155939(A1) 申请公布日期 2010.06.24
申请号 US20090432367 申请日期 2009.04.29
申请人 VIA TECHNOLOGIES, INC. 发明人 CHANG WEN-YUAN;CHEN WEI-CHENG;HSU YEH-CHI
分类号 H01L23/498;C25D5/02;H05K1/09 主分类号 H01L23/498
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