| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve a semiconductor memory device capable of relieving a sporadic failure of bits. Ž<P>SOLUTION: The semiconductor memory device includes a memory cell array 20, a read amplifier RAMP disposed outside the memory cell array 20 to amplify data read from the memory cell array 20, a write amplifier WAMP disposed outside the memory cell array 20 to amplify data to be written in the memory cell array 20, and a relieving storage element SC disposed outside the memory cell array 20 to be connected to the input end of the read amplifier RAMP and the output end of the write amplifier WAMP via a switch SW. Thus, the necessity of changing the operation timing of a main amplifier MAMP and the relieving storage element SC according to the position of a memory block is eliminated, and the number of elements necessary for connection to the relieving storage element SC is limited to a minimum. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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