| 摘要 |
An RF CMOS transistor, designed to decrease connection line resistance, comprising local, narrow interconnect lines 206, which are constrained substantially above the active area 202 of the transistor, are each connected to either a source terminal 208 or a drain terminal 210, whereby the source and the drain terminal 208,210 are arranged orthogonally to the local interconnect lines 206. Each terminal 208,210 may be significantly wider than a local interconnect line 206. The local interconnect lines 206 may be formed in a first metal layer and the source and drain terminals 208,210 are formed in one or more subsequent metal layers. A method is also disclosed comprising forming each of the layers defined. |
