Phase locked loop with controlled loop filter capacitance multiplier

摘要

A phase locked loop (PLL) has an input 12, a phase detector 14, a charge pump 16, a loop filter 18 and a voltage controlled oscillator (VCO) 20 connected to the output 22 of the loop. The voltage controlled oscillator 20 is connected to variable divider 24 in the feedback path of the loop. The PLL is characterized in that a property of the loop filter 18, such as an effective capacitance value 30, is controlled based on a value of the controllable frequency division ratio. The capacitance value 30 may be scaled by a current mirror circuit (fig.3). The current mirror circuit may be controlled by a control signal derived from the frequency division ratio via a look up table 38. The invention achieves a reduction in the area required for the capacitor of the loop filter.