| 摘要 |
Precise timing information produced by a block average module may be provided to signal processing circuitry. A sample period value generator may produce samples of the input data period values. A progressive block averaging computation may be applied to the generated input data period value samples. The output of the progressive block averaging computation may be used as the precise input sample rate information. The precise input sample rate information may in turn drive a signal processing application. The precision of the clock information may be increased with an increase in startup overhead.
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