发明名称 Systems and methods for fabricating nanometric-scale semiconductor devices with dual-stress layers using double-stress oxide/nitride stacks
摘要 Systems and methods for fabricating semiconductor devices with dual-stress layers using double-stress oxide/nitride stacks. A method comprises providing NMOS and PMOS regions, selectively forming a dual-stack tensile stress layer over the NMOS region by depositing a tensile silicon nitride layer over the NMOS and PMOS regions, depositing a tensile silicon oxide layer over the tensile silicon nitride layer, removing a portion of the tensile silicon oxide layer from the PMOS region, and removing a portion of the tensile silicon nitride layer from the NMOS region and selectively forming a dual stack compressive stress layer over the PMOS region by depositing a compressive silicon nitride layer over the NMOS and PMOS regions, depositing a compressive silicon oxide layer over the compressive silicon nitride layer, removing a portion of the compressive silicon oxide layer from the NMOS region, and removing a portion of the compressive silicon nitride layer from the NMOS region.
申请公布号 US7741168(B2) 申请公布日期 2010.06.22
申请号 US20070782984 申请日期 2007.07.25
申请人 SEMATECH, INC. 发明人 SONG SEUNG-CHUL;BARNETT JOEL;JU BYONG SUN
分类号 H01L21/8238 主分类号 H01L21/8238
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