| 摘要 |
A system and method for testing an integrated circuit is disclosed. One embodiment includes at least one central processing unit, at least one volatile memory area, and an interface, wherein the volatile memory area is connected to the interface to be written thereto by the interface. The system includes a test device connected with the integrated circuit which is configured to stop the program execution, write data in the volatile memory by using the interface, and start the program execution.
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