| 摘要 |
PURPOSE: A semiconductor device with have a buried gate electrode structure is provided to improve a short margin between BL/BC and BL/storage nodes by forming a capping layer in an upper part of BL. CONSTITUTION: An inter-layer insulating film is formed on a semiconductor substrate. A cell bit line is formed in a memory cell area. A capping layer(165) and the cell bit line are formed at the same time when a DC conductive film connecting a cell active region and a cell bit line is formed. The insulating layer(170) for the line type Vichy is crossed with the cell bit line. A Vichy is formed by using an insulating layer for the cell bit line, the DC conductive film, and a line type Vichy formation.
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