| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device preventing a threshold voltage from varying owing to capacitive coupling with an adjacent cell. <P>SOLUTION: A memory cell array 1 is connected to a word line and a bit line. A plurality of memory cells that are for storing one value among n values (n is a natural number greater than three) in each one of the memory cells and arranged in a matrix manner. Control circuits 8 and 9 control potentials of the word and bit lines responsive to input data, and write data in the memory cell. The control circuits 8 and 9 apply individual writing voltages corresponding to respective pieces of writing data; after completion of applying the writing voltages for the entire n values, the circuits 8 and 9 verify each piece of writing data. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
