发明名称 DATA PROCESSING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce power consumption of a portion to decode compressed data, in a device for reproducing the compressed data of voices, moving images, etc. SOLUTION: A CPU 214 issues a transfer instruction after decoding an MP3 data and storing it into a buffer memory 230. In the CPU 214, a predetermined time period is required before a first transfer instruction can be issued after power supply is initiated. According to the transfer instruction, a DMA controller 240 transfers the data stored in the buffer memory 230. According to the data amount waiting for transfer in the buffer memory 230, a power supply control unit 280 switches off the power supply to a first area 210, when a time period required for the completion of the data transfer presently waiting for transfer becomes a first time period longer than a predetermined time period. Thereafter, when the time period required for the completion of the data transfer presently waiting for transfer becomes a second time period that is longer than and inclusive of the predetermined time period, and shorter than the first time period, the power supply control unit 280 switches on the power supply to the first area 210. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010134858(A) 申请公布日期 2010.06.17
申请号 JP20080312458 申请日期 2008.12.08
申请人 RENESAS ELECTRONICS CORP 发明人 NISHIO YOICHIRO
分类号 G06F1/32;G11B20/10 主分类号 G06F1/32
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