| 摘要 |
PROBLEM TO BE SOLVED: To implement continuous write and read without data loss with the use of a single port memory. SOLUTION: The speed conversion circuit includes a write buffer circuit for holding write data synchronous with a first clock signal of a write clock frequency, an asynchrony absorption circuit for providing asynchrony absorption between the first clock signal and a second clock signal of a read clock frequency independent of the first clock signal, and a RAM controller circuit for controlling write to and read from the single port memory. The asynchrony absorption circuit adjusts the data length of the write data held in the write buffer circuit in accordance with the second clock signal, and outputs the adjusted write data to the RAM controller circuit. COPYRIGHT: (C)2010,JPO&INPIT
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