ERROR DETECTION IN A MULTI-PROCESSOR DATA PROCESSING SYSTEM

摘要

A system and method are provided. The system comprises a first and second processor (12, 14), and a cross-signaling interface (22). The first processor (12) executes instructions. The second processor (14) executes the instructions in lockstep with the first processor (12). The cross-signaling interface (22) is coupled between the first and second processors and is for signaling both an unanticipated altered state a location of the unanticipated altered state in the first processor (12) to the second processor (12) to cause the second processor (14) to emulate the unanticipated altered state in lockstep with the first processor (12). The method comprises: executing instructions in a first processor (12); executing the instructions in a second processor (14) in lockstep with the first processor (12); detecting an error condition in the first processor (12); transmitting information about the error condition to the second processor (14); processing the error condition in the first processor (12); and causing the first and second processor to emulate the error condition in lockstep.