发明名称 |
LOW-POWER FREQUENCY DIVIDER AND LOW-POWER PHASE-LOCKED LOOP EQUIPPED THEREWITH |
摘要 |
The present invention discloses a low-power frequency divider and a low-power phase-locked loop which keep power consumption to a minimum. The low-power frequency divider generates a frequency-divided signal with frequency equal to the frequency of the input signal divided by a fixed ratio, and is equipped with a phase-voltage converter, a comparator, a phase-locked loop and a reset circuit. The phase-voltage converter generates a phase-voltage signal corresponding to the phase change of said input signal in response to the reset circuit. The comparator generates a comparison signal by comparing said phase-voltage signal with the reference phase-voltage signal. The phase-locked loop generates said frequency-divided signal by matching said input signal and said comparison signal. The reset circuit generates said reset signal in response to said comparison signal or said frequency-divided signal.
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申请公布号 |
WO2009151285(A4) |
申请公布日期 |
2010.06.17 |
申请号 |
WO2009KR03135 |
申请日期 |
2009.06.11 |
申请人 |
SUH, YOUNG SUK;KIM, YOUNG SIK |
发明人 |
SUH, YOUNG SUK;KIM, YOUNG SIK |
分类号 |
H03K21/00 |
主分类号 |
H03K21/00 |
代理机构 |
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地址 |
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