发明名称 Apparatus for data recovery in a synchronous chip-to-chip system
摘要 An apparatus (50) that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal (DQS) to align a data-sampling signal (DSS) for sampling data signal (DQ1 DQN) that was sent along with the timing reference signal (DQS). The data-sampling signal (DDS) may be provided by adjustably delaying a clock signal (CLK) according to the information acquired from the strobe signal (DQS). The data-sampling signal (DSS) may also have in improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal (DQS) may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.
申请公布号 EP2197143(A2) 申请公布日期 2010.06.16
申请号 EP20100156597 申请日期 2002.06.18
申请人 RAMBUS INC. 发明人 BEST, SCOTT C.;WARMKE, RICHARD E.;ROBERTS, DAVID B.
分类号 H04L7/02;H04L7/033;G06F1/10;H03L7/07;H03L7/081 主分类号 H04L7/02
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