发明名称 BUFFER ENABLE SIGNAL GENERATING CIRCUIT AND INPUT CIRCUIT USING THE SAME
摘要 PURPOSE: A buffer enable signal generation circuit and an input circuit are provided to reduce an unnecessary current consumption in a standby state by activating an address buffer and a command buffer for a prescribed section in case an outer command is inputted. CONSTITUTION: A buffer enable signal generation circuit(1) generates the buffer enable signal in response to an outer command. The buffer enable signal decides an enable section. A buffer circuit(2) buffers and outputs the outer command and an outer address signal in response to the buffer enable signal. The buffer circuit includes an address buffer and a command buffer. The address buffer(20) buffers and outputs the outer address signal in response to the buffer enable signal. The command buffer(21) buffers and outputs a first to a fourth outer command in response to the buffer enable signal.
申请公布号 KR20100064902(A) 申请公布日期 2010.06.15
申请号 KR20080123553 申请日期 2008.12.05
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HWANG, MI HYUN
分类号 G11C7/10;G11C8/04 主分类号 G11C7/10
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