发明名称 |
MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS |
摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to precisely form a CD of patterns of a trench and a via when forming the pattern of a multilayer wiring of copper by forming the trench and the via below a resolution limit with a dual damascene method. CONSTITUTION: A first hard mask layer and a second hard mask layer are formed on a layer to be etched(S11). A mask pattern for forming a trench, which is comprised of a second mask layer and include a first pitch, is formed as an etching mask when forming a pattern of the trench(S12). A first hard mask layer is etched using a second resist layer with an opening formed with a fourth pitch and a second resist pattern which is composed of a first organic layer with a smaller opening than that of a second resist layer and is connected to the opening of the second resist layer(S15-S17).
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申请公布号 |
KR20100065007(A) |
申请公布日期 |
2010.06.15 |
申请号 |
KR20090015192 |
申请日期 |
2009.02.24 |
申请人 |
TOKYO ELECTRON LIMITED |
发明人 |
YATSUDA KOICHI;NISHIMURA EIICHI |
分类号 |
H01L21/768;H01L21/28;H01L21/3205 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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