发明名称 Method of fabricating semiconductor device including planarizing conductive layer using parameters of pattern density and depth of trenches
摘要 A method of fabricating a semiconductor device includes forming a conductive layer on an insulating layer having a plurality of trenches on a semiconductor substrate, such that the conductive layer fills in the plurality of trenches formed in the insulating layer, and calculating a target eddy current value to measure an end point using parameters of a pattern density and a depth of the trenches. The method further includes planarizing the conductive layer and measuring eddy current values on the conductive layer using an eddy current monitoring system, and stopping the planarization when the measured eddy current value reaches the target eddy current value to form a planarized conductive layer having a target height on the insulating layer.
申请公布号 US7737038(B2) 申请公布日期 2010.06.15
申请号 US20060567927 申请日期 2006.12.07
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE SEUNG-MAHN;PARK BYUNG-LYUL;JUNG MOOJIN
分类号 H01L21/302 主分类号 H01L21/302
代理机构 代理人
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