发明名称 |
Multiple address sequence cache pre-fetching |
摘要 |
A method is provided for pre-fetching data into a cache memory. A first cache-line address of each of a number of data requests from at least one processor is stored. A second cache-line address of a next data request from the processor is compared to the first cache-line addresses. If the second cache-line address is adjacent to one of the first cache-line addresses, data associated with a third cache-line address adjacent to the second cache-line address is pre-fetched into the cache memory, if not already present in the cache memory.
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申请公布号 |
US7739478(B2) |
申请公布日期 |
2010.06.15 |
申请号 |
US20070683573 |
申请日期 |
2007.03.08 |
申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
VEAZEY JUDSON E.;GAITHER BLAINE D. |
分类号 |
G06F12/00 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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