发明名称 Scan test circuitry using a state machine and a limited number of dedicated pins
摘要 An electronic circuit includes a group of devices which facilitate scan testing of at least one part of the electronic circuit. Those devices include a scan test device. The circuit further includes a state machine which operates to transfer data from an input pin of the circuit which is dedicated to the state machine to the devices relating to scan testing. The state machine supports a plurality of data transfer protocols. The choice of the protocol to be used is made as a function of a signal received on the input pin. Responsive to an input pin signal, the state machine enters an operational mode wherein scan test programming data is serially received at the input pin and communicated to the devices which facilitate scan testing. More specifically, the scan test programming data is serially communicated to a scan test register, where the data is output in parallel to the scan test device.
申请公布号 US7739566(B2) 申请公布日期 2010.06.15
申请号 US20070698249 申请日期 2007.01.24
申请人 STMICROELECTRONICS S.A. 发明人 ARMAGNAT PAUL
分类号 G01R31/28;G06F3/00 主分类号 G01R31/28
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