| 摘要 |
A multi-mode SerDes may be implemented in at least two different optoelectronic device architectures. The serializer includes a dual-mode bypass block for allowing data signals to go straight from input nodes to a multiplexing block or for decoding encoded data signals. A final dynamic high speed multiplexer multiplexes two data signals into one serial signal, or allows a single signal to go through. The deserializer includes an input dynamic high speed demultiplexer for demultiplexing one serial signal into two, or for allowing a serial signal through. A dual-mode bypass block is provided to allow data signals to go straight through from a demultiplexing block to output nodes or to encode data signals prior to providing them to the output nodes.
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