发明名称 DECODER
摘要 <P>PROBLEM TO BE SOLVED: To provide a decoder capable of estimating a first order or an approximate value of the first order from inputted signals quickly without including a number of computing units. Ž<P>SOLUTION: A first conversion section 32 converts each of a plurality of input signals to generate a plurality of first conversion signals, based on a first conversion rule. A second conversion section 42 generates a second conversion signal indicating a logical operation result in bit units of the plurality of first conversion signals according to a second conversion table. A third conversion section 52 converts a logical operation signal to generate a third conversion signal indicating the value of the signal of the first order in the plurality of input signals, based on a third conversion rule. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010130358(A) 申请公布日期 2010.06.10
申请号 JP20080302985 申请日期 2008.11.27
申请人 SUMITOMO ELECTRIC IND LTD;SUMITOMO ELECTRIC SYSTEM SOLUTIONS CO LTD 发明人 MAEBATAKE TAKASHI;TACHIBANA HIROYUKI
分类号 H03M13/19 主分类号 H03M13/19
代理机构 代理人
主权项
地址