SAMPLING CIRCUIT AND RECEIVER UTILIZING THE SAME

摘要

Disclosed are a sampling circuit and a receiver that have a high level of filter design flexibility and excellent image rejection characteristics. Signals with phases that differ by 90° are sampled using an IQ generating circuit (101) and are weighted by each of multiple parallel-connected discrete-time circuits (102-1-102-n), and the result of addition by an output synthesizing circuit (103) is ultimately output. Alternatively, a configuration in which the multiple parallel-connected discrete-time circuits (102-1-102-n) and the output synthesizing circuit (103) are cascade-connected is adopted, so that frequency characteristics having an attenuation pole to one side can be achieved and excellent image rejection characteristics can be obtained.