发明名称 |
CHIP PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME |
摘要 |
A chip package structure including a heat dissipation substrate, a chip and a heterojunction heat conduction buffer layer is provided. The chip is disposed on the heat dissipation substrate. The heterojunction heat conduction buffer layer is disposed between the heat dissipation substrate and the chip. The heterojunction heat conduction buffer layer includes a plurality of pillars perpendicular to the heat dissipation substrate. The aspect ratio of each pillar is between about 3:1 and 50:1. |
申请公布号 |
US2010139767(A1) |
申请公布日期 |
2010.06.10 |
申请号 |
US20090472359 |
申请日期 |
2009.05.26 |
申请人 |
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE |
发明人 |
HSIEH JUI-CHING;CHANG PIN;CHEN CHUNG-DE;PAN LI-CHI;WANG YU-JEN;WANG CHIN-HORNG |
分类号 |
H01L31/024;H01L21/50;H01L23/34;H01L33/00 |
主分类号 |
H01L31/024 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|