发明名称 SYSTEM AND METHOD FOR REDUCING EME EMISSIONS IN DIGITAL DESYNCHRONIZED CIRCUITS
摘要 A system includes first and second synchronous circuits and an asynchronous circuit configured to receive input from the first synchronous circuit and to send output to the second synchronous circuit. First and second variable clock generators are configured to drive the first and second synchronous circuit. A delay circuit is configured in a pathway from the first variable clock generator to the second variable clock generator, the delay circuit being configured to add a delay to the pathway based upon a processing time or an expected processing time of the asynchronous circuit. The delay circuit is further configured to induce additional uneven delay into the pathway. The additional uneven delay disperses local current absorption, thereby decreasing overall electro magnetic emissions of the system.
申请公布号 WO2009087450(A3) 申请公布日期 2010.06.10
申请号 WO2008IB03575 申请日期 2008.12.19
申请人 INSTITUTE OF COMPUTER SCIENCE;SOTIRIOU, CHRISTOS, P. 发明人 SOTIRIOU, CHRISTOS, P.
分类号 H03K19/003;G06F1/08;G06F9/38;H04B15/02 主分类号 H03K19/003
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