发明名称 CELL ARRAY FOR ANALOG CIRCUIT AND ANALOG INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide an analog circuit manufacturable in a short lead time and having a high integration degree. <P>SOLUTION: In these arrays ARYP1, ARYN1 for analog circuits where a plurality of transistor cells PMOSC2, NMOSC2 are arranged in an array-like form, each transistor cell includes: a first region SOURCE1, a first channel region, a common drain region DRAIN, a second channel region and a second source region SOURCE2 which are sequentially arranged adjacent to one another; and a first gate electrode POLYG1 and a second gate electrode POLYG2 arranged on the first channel and the second channel, respectively. The first gate electrode POLYG1 and the second gate electrode POLYG2 are used by being connected to each other; and the first region SOURCE1 and the second source region SOURCE2 are used by being connected to each other. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010129895(A) 申请公布日期 2010.06.10
申请号 JP20080305100 申请日期 2008.11.28
申请人 FUJITSU MICROELECTRONICS LTD 发明人 ARIGA KENTA;TACHIBANA MASARU;OKADA KOJI
分类号 H01L21/82;H01L21/822;H01L27/04;H01L27/118 主分类号 H01L21/82
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