发明名称 TIMING ADJUSTMENT DEVICE AND SEMICONDUCTOR TESTING APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a timing adjusting device capable of expanding the variable range of timing without increasing the power consumption, adjusting the timing with a high precision and a high resolution and continuously adjusting the timing, and to provide a semiconductor testing apparatus including the device. SOLUTION: The timing adjusting device 3 includes, a rate signal generating unit 11 for generating a rate signal R1, an orthogonal modulation unit 13 for advancing or delaying the rate signal R1 generated in the rate signal generating unit 11 by a time corresponding to a predetermined phase angle, and FIFO memories 16a, 16b for storing data D11, D21 which define the rising edge position and the falling edge position of a test pattern P2, and for reading out the stored data using the advanced or delayed rate signal in the orthogonal modulation unit 13. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010127692(A) 申请公布日期 2010.06.10
申请号 JP20080300858 申请日期 2008.11.26
申请人 YOKOGAWA ELECTRIC CORP 发明人 NARUKAWA KENICHI
分类号 G01R31/3183 主分类号 G01R31/3183
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