发明名称 Semiconductor wiring structures including dielectric cap within metal cap layer
摘要 Semiconductor wiring structures including a dielectric layer having a metal wiring line therein, a via extending downwardly from the metal wiring line, a metal cap layer over the metal wiring line, and a local dielectric cap positioned within a portion of the metal cap layer and in contact with the metal wiring line and a related method are disclosed. The local dielectric cap represents an intentionally created weak point in the metal wiring line of a dual-damascene interconnect, which induces electromigration (EM) voiding in the line, rather than at the bottom of a via extending downwardly from the metal wiring line. Since the critical void size in line fails, especially with metal cap layer (liner) redundancy, is much larger than that in via fails, the EM lifetime can be significantly increased.
申请公布号 US7732924(B2) 申请公布日期 2010.06.08
申请号 US20070761495 申请日期 2007.06.12
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHANDA KAUSHIK;FILIPPI RONALD G.;WANG PING-CHUAN;YANG CHIH-CHAO
分类号 H01L23/52 主分类号 H01L23/52
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