发明名称 |
Process for wafer bonding |
摘要 |
The present disclosure provide a method of manufacturing a microelectronic device. The method includes forming a top metal layer on a first substrate, in which the top metal layer has a plurality of interconnect features and a first dummy feature; forming a first dielectric layer over the top metal layer; etching the first dielectric layer in a target region substantially vertically aligned to the plurality of interconnect features and the first dummy feature of the top metal layer; performing a chemical mechanical polishing (CMP) process over the first dielectric layer; and thereafter bonding the first substrate to a second substrate.
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申请公布号 |
US7732299(B2) |
申请公布日期 |
2010.06.08 |
申请号 |
US20070673652 |
申请日期 |
2007.02.12 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
CHANG FA-YUAN;LAI TSUNG-MU;LIANG KAI-CHIH;WU HUA-SHU;HO CHIN-HSIANG;SHIAU GWO-YUH;CHENG CHU-WEI;LIU MING-CHYI;HSIEH YUAN-CHIH;TSAI CHIA-SHIUNG;SHEN NICK Y. M.;PAI CHING-CHUNG |
分类号 |
H01L21/338;H01L21/30;H01L21/46 |
主分类号 |
H01L21/338 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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