发明名称 APPARATUS AND METHOD FOR REDUCING PITCH IN AN INTEGRATED CIRCUIT
摘要 An apparatus and method, the apparatus includes an electronic chip package including an electronic chip having a first and a second contact pad formed thereon, a first dielectric layer coupled to the electronic chip, a second dielectric layer coupled to the first dielectric layer such that a dielectric boundary lies therebetween, a first and a second cover pad positioned along the dielectric boundary, a metal interconnect formed along a first multi-layer via and coupled to the first cover pad and contact pad, and a metal interconnect formed along a second multi-layer via and coupled to the second cover pad and contact pad. The first multi-layer via extends through the second dielectric layer, the first cover pad, and the first dielectric layer to the first contact pad. The second multi-layer via extends through the second dielectric layer, the second cover pad, and the first dielectric layer to the second contact pad.
申请公布号 US2010133705(A1) 申请公布日期 2010.06.03
申请号 US20080326231 申请日期 2008.12.02
申请人 FILLION RAYMOND ALBERT;DUROCHER KEVIN M;SAIA RICHARD JOSEPH;MCCONNELEE PAUL ALAN 发明人 FILLION RAYMOND ALBERT;DUROCHER KEVIN M.;SAIA RICHARD JOSEPH;MCCONNELEE PAUL ALAN
分类号 H01L23/488;H01L21/60 主分类号 H01L23/488
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