发明名称 REDUCED TOPOGRAPHY-RELATED IRREGULARITIES DURING THE PATTERNING OF TWO DIFFERENT STRESS-INDUCING LAYERS IN THE CONTACT LEVEL OF A SEMICONDUCTOR DEVICE
摘要 In sophisticated semiconductor devices, stress-inducing materials may be provided above the basic transistor devices without any etch control or etch stop materials, thereby enabling an efficient de-escalation of the surface topography, in particular above field regions including closely spaced polysilicon lines. Furthermore, an additional stress-inducing material may be provided on the basis of the superior surface topography, thereby providing a highly efficient strain-inducing mechanism in performance-driven transistor elements.
申请公布号 US2010133620(A1) 申请公布日期 2010.06.03
申请号 US20090623493 申请日期 2009.11.23
申请人 RICHTER RALF 发明人 RICHTER RALF
分类号 H01L27/092;H01L21/306 主分类号 H01L27/092
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