发明名称 ARCHITECTURE FOR MULTI-STAGE DECODING OF A CABAC BITSTREAM
摘要 Techniques for optimizing the Context-based Adaptive Binary Arithmetic Coding (CABAC) bitstream decoding are disclosed. In one configuration, a device has a first processing circuit operative to decode a Context-based Adaptive Binary Arithmetic Coding (CABAC) bitstream into an intermediate signal having a CABAC decoded standard format and a decoded order. A second processing circuit decodes the intermediate signal using a non-CABAC decoding standard. A buffer is provided between the first and second processing circuits to improve processing speeds.
申请公布号 KR20100058618(A) 申请公布日期 2010.06.03
申请号 KR20107007048 申请日期 2008.08.29
申请人 QUALCOMM INCORPORATED 发明人 BAO YILIANG;YOSHINO TOSHIAKI;WANG KAI
分类号 H04N7/24 主分类号 H04N7/24
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