| 摘要 |
PROBLEM TO BE SOLVED: To provide an integrated circuit having a novel layout architecture for enhancing performance. SOLUTION: This integrated circuit includes: an active region 102 in a semiconductor substrate; a field effect transistor 108 disposed in the active region, and including a first gate 114, a first source 116 formed in the active region and disposed in a first region adjacent to the first gate, and a first drain 118 formed in the active region and disposed in a second region adjacent to the first gate; and an isolation structure disposed in the active region, and including an isolation gate 140 disposed adjacently to the first drain, and an isolation source 142 formed in the active region, and disposed adjacently to the isolation gate such that the isolation source and the first drain are located on different sides of the isolation gate. COPYRIGHT: (C)2010,JPO&INPIT |
