| 摘要 |
<p>A resizable cache memory is disclosed. In a particular embodiment, a system is disclosed and includes a Built-In Self Test (BIST) circuit configured to test a cache memory. The system further includes a non-volatile storage device including an E-fuse array to store one or more indicators. Each indicator identifies a corresponding memory address of a failed location of the cache memory that has been detected by the BIST circuit.</p> |
