发明名称 ARITHMETIC DECODING APPARATUS
摘要 Disclosed herein is an arithmetic decoding apparatus including an instruction decoder configured to decode an arithmetically encoded data decoding instruction to be executed for carrying out an arithmetic-decoding process of arithmetically decoding arithmetically encoded data into a binary signal; an execution condition code holding section configured to hold the binary signal obtained as a result of an immediately preceding arithmetic-decoding process as an execution condition code; and an arithmetic decoding execution section configured to determine whether a context number specified by the arithmetically encoded data decoding instruction is to be used as a context index as it is or the specified context number incremented by 1 is to be used as the context index in accordance with the execution condition code, and carry out the arithmetic decoding process by making use of the determined context index.
申请公布号 US2010134330(A1) 申请公布日期 2010.06.03
申请号 US20090625630 申请日期 2009.11.25
申请人 SAKAGUCHI HIROAKI 发明人 SAKAGUCHI HIROAKI
分类号 H03M7/34 主分类号 H03M7/34
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