PHASE-COMPENSATED PULSE WIDTH MODULATION CIRCUIT AND DIGITAL/ANALOG CONVERSION DEVICE

摘要

A phase-compensated pulse width modulation circuit includes: a signal generation circuit (10) which generates from an input signal (IN), a first and a second pulse width modulation signal (PWM #1, PWM #2) which are correlated to each other in accordance with a sampling synchronization signal (Sample) generated in synchronization with a clock (CLK); and a signal output circuit (20) which combines the signal of the positive polarity and the signal of the negative polarity of the first pulse width modulation signal (PWM #1) generated by the signal generation means and combines the synthesized first pulse width modulation signal (PWM #1) and the second pulse width modulation signal (PWM #2) for output.