发明名称 Testing circuit for measuring a frequency of signal output from clock generator
摘要 A testing circuit measures a center frequency of a clock signal outputted by a clock generator. The clock generator has a frequency modulator capable of (1) performing a frequency sampling accurately for the duration of modulation frequency and reducing the duration for frequency measurements, and (2) implementing proper testing of the down-spread controlling feature as one of the SSCG modulation functions by accurately determining the center frequency of the clock signal. The testing circuit measures a center frequency of a clock signal outputted by a clock generator by converting an analog modulation signal into a digital signal and outputting the digital signal, counting the period of the clock signal to obtain a count according to the digital signal outputted by the clock generator, and comparing the count with the predetermined specification values related to the center frequency of the clock signal to obtain and output a comparison result.
申请公布号 US7729418(B2) 申请公布日期 2010.06.01
申请号 US20060440088 申请日期 2006.05.25
申请人 RICOH COMPANY, LTD. 发明人 WATABE YUJI
分类号 H04B3/46 主分类号 H04B3/46
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