发明名称 Pseudo-synchronous one wire bidirectional bus interface
摘要 A system and method for transferring data between a transmitter and a receiver over a single conductor is disclosed. During a data transfer operation of bit of information, the voltage level on the conductor is changed from a first voltage level to a second voltage level and maintained at the second voltage level for a predetermined duration of time. The predetermined duration of time is determined by the logical state of the data bit being transmitted. Upon expiration of the predetermined duration of time the voltage level on the conductor is driven back to substantially the first voltage level.
申请公布号 US7729427(B2) 申请公布日期 2010.06.01
申请号 US20040875763 申请日期 2004.06.24
申请人 INTERSIL AMERICAS INC. 发明人 KWOK CHUNG Y.
分类号 H04B3/00;H04B3/50;H04B3/54 主分类号 H04B3/00
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