发明名称 |
DRAM device with cell epitaxial layers partially overlap buried cell gate electrode |
摘要 |
A semiconductor device may include a substrate having a cell active region. A cell gate electrode may be formed in the cell active region. A cell gate capping layer may be formed on the cell gate electrode. At least two cell epitaxial layers may be formed on the cell active region. One of the at least two cell epitaxial layers may extend to one end of the cell gate capping layer and another one of the at least two cell epitaxial layers may extend to an opposite end of the cell gate capping layer. Cell impurity regions may be disposed in the cell active region. The cell impurity regions may correspond to a respective one of the at least two cell epitaxial layers.
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申请公布号 |
US7728373(B2) |
申请公布日期 |
2010.06.01 |
申请号 |
US20070705109 |
申请日期 |
2007.02.12 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SEO HYEOUNG-WON;YOON JAE-MAN;LEE KANG-YOON;KIM BONG-SOO |
分类号 |
H01L0021/002842 |
主分类号 |
H01L0021/002842 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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