发明名称 ERROR DETECTION AND RECOVERY WITHIN PROCESSING STAGES OF AN INTEGRATED CIRCUIT
摘要 A data processing apparatus and method are provided for recovering from errors in the data processing apparatus. The data processing apparatus comprises processing logic operable to perform a data processing operation, and a plurality of sampling circuits, each sampling circuit being located at a predetermined point in the processing logic and operable to sample a value of an associated digital signal generated by the processing logic at that predetermined point. Each of the sampling circuits includes a backup latch for storing a backup copy of the associated digital signal value, and at least one of the sampling circuits is operable to temporally sample the value of the associated digital signal at a first time and at at least one later time, and to store as a backup copy a selected one of the sampled values representing a correct value. The value of the associated digital signal sampled at the first time is initially output from that sampling circuit, and that sampling circuit is operable to determine an occurrence of an error in the value of the associated digital signal sampled at the first time, and to issue an error signal upon determination of that error. The data processing apparatus further comprises error recovery logic operable in response to the error signal to implement a recovery procedure during which selected sampling circuits output as their sampled associated digital signal value the value stored in their backup latch.
申请公布号 IL168928(A) 申请公布日期 2010.05.31
申请号 IL20050168928 申请日期 2005.06.01
申请人 ARM LIMITED;UNIVERSITY OF MICHIGAN 发明人
分类号 G06F1/32 主分类号 G06F1/32
代理机构 代理人
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