发明名称 |
A NOVEL LAYOUT ARCHITECTURE FOR PERFORMANCE ENHANCEMENT |
摘要 |
<p>PURPOSE: A new layout structure for the performance improvement selectively makes something/somebody grow up the thermal oxide trench lighter. The trench interface is improved. CONSTITUTION: The first field effect transistor is arranged in the active area(102). The first field effect transistor comprises the first gate(114), the first source(116) and the first drain(118). The first source is arranged to the first gate on the first area which is near. The first drain is arranged to the first gate on the second part which is near. The isolation structure is arranged in the active area. The isolation structure comprises the isolation gate(140) and the isolation source neighbor-arranged with the isolation gate.</p> |
申请公布号 |
KR20100057507(A) |
申请公布日期 |
2010.05.31 |
申请号 |
KR20090112203 |
申请日期 |
2009.11.19 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
HOU YUNG CHIN;GUO TA PEN;CHUANG HARRY HAKLAY;DIAZ H. CARLOS;LU LEE CHUNG;TIEN LI CHUN;LAW M.K. OSCAR;CHANG CHIH CHIANG;TAI CHUN HUI;LEE JONATHAN |
分类号 |
H01L21/336;H01L29/78 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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