| 摘要 |
<p>A frequency multiplier circuit (200), comprising a first stage including a first differential pair of amplifier elements (Q1, Q2) having respective current conduction paths connected in parallel between first and second nodes (202, 204) and respective control terminals connected to receive input signals of opposite polarity at an input frequency (?RF) in the radio frequency range, the first and second nodes (202, 204) being connected to respective bias voltage supply terminals (206, 208) through first and second impedances (ZL1, ZL2) respectively so that current flowing differentially in the current conduction paths of the first differential pair of amplifier elements (Q1, Q2) produces a voltage difference across the first and second nodes (202, 204) at a frequency which contains a harmonic (2?RF) of the input frequency, and a second stage including a second differential pair of amplifier elements (Q3, Q4) coupled at the harmonic of the input frequency with the first and second nodes (202, 204) to amplify differentially the voltage difference and produce an output signal at the harmonic (2?RF) of the input frequency. Radio frequency connections apply the voltage difference across the first and second nodes (202, 204) at the frequency of the harmonic to the second differential pair of amplifier elements (Q3, Q4) and block direct current, and separate direct current connections connect respectively the first differential pair of amplifier elements (Q1, Q2) and the second differential pair of amplifier elements (Q3, Q4) across the bias voltage supply terminals (206, 208).</p> |
