| 摘要 |
PROBLEM TO BE SOLVED: To reduce area and cost of a semiconductor integrated circuit by easily attaining a layout design without awareness of pad limitation and core limitation. SOLUTION: In a layout design device 300, an input part 301 receives input of circuit information of a design object circuit, and a creation part 302 creates layout information of the design object circuit in which a core region included in the input circuit information is ensured. A layout part 303 performs arrangement and wiring of an I/O circuit included in the circuit information in a region other than the core region on the created layout information. A determination part 308 determines an allocatable region of pads included in the circuit information on the created layout information. An optimization part 309 optimizes the area of the pads to a maximum size in which the total area of an arrangement required number of pads does not exceed the area of the allocatable region. An arrangement part 310 arranges the optimized pads in the allocatable region. COPYRIGHT: (C)2010,JPO&INPIT
|
