发明名称 PWM DC steady-state output circuit
摘要 In a pulse-width-modulation (PWM) direct current (DC) steady-state output circuit, there are included an electrode switch and a resistor-capacitor (RC) integrating filter. The electronic switch has a signal input end, via which a PWM signal is input, and a high-level end. The RC integrating filter includes at least one RC filtering unit and a first protection unit. There can be (1+n) order(s) of the RC filtering unit(s) with a first-order RC filtering unit connected to the electronic switch and the first protection unit and the RC filtering unit(s) at the rest order(s), if any, being sequentially connected to the first-order RC filtering unit one by one. When the electronic switch has signals input thereto, the RC integrating filter makes feedback compensation to enable output of a steady-state DC level.
申请公布号 US2010127797(A1) 申请公布日期 2010.05.27
申请号 US20080276929 申请日期 2008.11.24
申请人 HUANG PO-SHENG 发明人 HUANG PO-SHENG
分类号 H03H7/00 主分类号 H03H7/00
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