| 摘要 |
Coherent modulator architectures of wireless communication devices are used for the processing of modulated RF signals. The circuitry comprises a DC/DC converter (204) which serves as an amplitude modulator, different amplification stages (204, 206, 212, 214), a bypass path (215) to selectively bypass at least one (214) of a cascade of class C, D, E, or F power amplifiers (212, 214), and an automatic power control (APC) loop (220) that guarantees power stability over time and temperature variations. To increase the efficiency of the amplification procedures needed for an amplitude modulation, the slow (narrowband) high-level components (222) and the fast (wideband) low-level components (224) of the signal representing the magnitude (I xLp (t) 1) of an I/Q modulation state (xLp (t)) are amplified in separate stages (204, 206) and are then combined by supplying the low-level components (224) to a power amplifier (206) whose gain is controlled depending on the amplified high-level components (222). At least one (214) of said cascade of power amplifiers (212, 214) can selectively be bypassed by a bypass circuitry (215), which is used for the sake of efficiency optimization. In the bypass mode, the DC power supply (Vbat) of the bypassed power amplifier (214) can selectively be switched off by means of a switch (SZ). It is used when the needed RF signal power is low and the driver PA (212) is able to produce enough gain.
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