| 摘要 |
A modulo m addition device of modular number system (further a device) including the first and second input registers, an output register, the first decoder, a group of m key elements, a group of m AND elements, four AND elements, a pulse generator, a frequency multiplier, a counter, a recirculating shift register consisting of m chargers, a comparison circuit, the first OR element. In the device there is an additional encoder and the second decoder, the second and third OR elements and a group of OR elements where the second input register output to the second decoder input is connected, the outputsandbeing connected correspondingly to the second and third OR element inputs, simultaneously, the second decoder outputs by pairs (valuated amount assigned to every pair of output buses is equal to value) through a corresponding OR element of the group is connected to a corresponding encoder input, the output being connected to the second comparison circuit input, the second OR element output is connected to the second input of the fourth AND element and the third OR element output is connected to the second input of the third AND element. |
