发明名称 Amplifying circuit
摘要 First and second voltage buffers are added to an amplifying circuit including input and output amplifying stages in which a P-MOS transistor and an N-MOS transistor operate as a push-pull circuit. An input of the first voltage buffer is connected to an output of the amplifying circuit, and an output of the first voltage buffer is connected via a first phase compensating capacitor to a gate electrode of the P-MOS transistor, and is connected via a second phase compensating capacitor to a gate electrode of the N-MOS transistor. An input of the second voltage buffer is connected to the output of the amplifying circuit, and an output of the second voltage buffer is connected via a third phase compensating capacitor to the gate electrode of the P-MOS transistor, and is connected via a fourth phase compensating capacitor to the gate electrode of the N-MOS transistor.
申请公布号 US7724089(B2) 申请公布日期 2010.05.25
申请号 US20080274015 申请日期 2008.11.19
申请人 OKI SEMICONDUCTOR CO., LTD. 发明人 MIYAMOTO KENICHI;ISHII HIROAKI
分类号 H03F3/45 主分类号 H03F3/45
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