发明名称 |
SOI MOSFET device with reduced polysilicon loading on active area |
摘要 |
Silicon-on-insulator (SOI) devices with reduced polysilicon loading on an active area uses at least one dielectric layer resistant to silicidation to separate at least one body contact region from source/drain regions, thus reducing gate capacitance and improving device performance. The SOI devices may be used in full depletion type transistors or partial depletion type transistors.
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申请公布号 |
US7723787(B2) |
申请公布日期 |
2010.05.25 |
申请号 |
US20080250049 |
申请日期 |
2008.10.13 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
HUANG SHAO-CHANG |
分类号 |
H01L29/786 |
主分类号 |
H01L29/786 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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