发明名称 |
Delay circuit, jitter injection circuit, and test apparatus |
摘要 |
There is provided a delay circuit that delays and outputs a given input signal. The delay circuit includes a first delaying section that delays the input signal, a second delaying section that further delays the input signal delayed by the first delaying section, and a delay setting section that sets a time delay in the second delaying section at a timing delayed by a predetermined time to a timing setting a time delay in the first delaying section.
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申请公布号 |
US7724811(B2) |
申请公布日期 |
2010.05.25 |
申请号 |
US20060535296 |
申请日期 |
2006.09.26 |
申请人 |
ADVANTEST CORPORATION |
发明人 |
ICHIYAMA KIYOTAKA;ISHIDA MASAHIRO;YAMAGUCHI TAKAHIRO |
分类号 |
H04B3/46;H04B17/00;H04Q1/20 |
主分类号 |
H04B3/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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