发明名称 TECHNIQUE FOR PROMOTING EFFICIENT INSTRUCTION FUSION
摘要 A technique to enable efficient instruction fusion within a computer system. In one embodiment, a processor logic delays the processing of a second instruction for a threshold amount of time if a first instruction within an instruction queue is fusible with the second instruction.
申请公布号 WO2010056511(A2) 申请公布日期 2010.05.20
申请号 WO2009US62219 申请日期 2009.10.27
申请人 INTEL CORPORATION;OUZIEL, IDO;RAPPOPORT, LIHU;VALENTINE, ROBERT;GABOR, RON;RAGHUVANSHI, PANKAJ 发明人 OUZIEL, IDO;RAPPOPORT, LIHU;VALENTINE, ROBERT;GABOR, RON;RAGHUVANSHI, PANKAJ
分类号 G06F9/06;G06F9/22;G06F9/30 主分类号 G06F9/06
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